A LDPC Parity Check Matrix Construction for Parallel Hardware Decoding

F. Verdier, D. Declercq
Third International Symposium on Turbo Codes and Related Topics, page 235--238 - Sept. 2003

BibTex references

@InProceedings{VD03,
  author       = "Verdier, F. and Declercq, D.",
  title        = "A LDPC Parity Check Matrix Construction for Parallel Hardware Decoding",
  booktitle    = "Third International Symposium on Turbo Codes and Related Topics",
  pages        = "235--238",
  month        = "Sept.",
  year         = "2003",
  address      = "Brest, France",
  key          = "Verdier TC03",
  url          = "http://publi-etis.ensea.fr/2003/VD03"
}

Other publications in the database

» F. Verdier
» D. Declercq